SerDes GX module doesn't see the GX clocking signal

I have solved my first problem 10 minutes ago.

By the way, I now have another message during compiling :

- the analysis is 100% Ok, but

- the fitter cant place a clock pin on the pin which the board I'm using uses

The error message is :

Error (170084): Can't route signal "clock~input" to atom "clock~inputclkctrl"

I obviously cant change the pin that the chip uses. Also, I have tried to put a pll inside the design, but it also fails during fitting.

I'm relatively new to Quartus, so I would really appreciate if someone could explain me how to fit this clock in this design.

I know the fitting with a pure hard coded VHDL system works. Maybe the NIOS processor puts too much requirements on the CycloneIV (115K LE).

Please let me know.

Regards.