Forum Discussion
New ContributorSDI TX XCVR Failed to work
Regular ContributorHi Bin,
As I understand it, you observe some problems with your design with the SDI TX core. Based on my understanding, there should be no dependency between HDMI and SDI cores. To further narrow down the problem, just to check with you on the following:
1. Are the CLKUSR and refclk to TX PLL to the SDI TX directly sourced from free-running oscillators on board? This is to ensure successful power up calibration.
2. From your description, seems like the tx_pll_locked stays low. We can narrow down our focus here because without the TX PLL achieving lock, the SDI TX will not work. Just to check with you which TX PLL type are you using?
3. Can you try with the latest Q21.2Pro to see if this problem persists? This is to isolate any Quartus dependent problem and any known issue which might have been fixed from Q19.2 to Q21.2 releases.
4. Is there any relation between the HDMI core and the SDI core? For example, sharing the same PLL and etc.
5. Please check through the Quartus compilation warnings to see if you can spot any anomaly ie TX PLL spacing rules violation and etc.
Please let me know if there is any concern. Thank you.
New ContributorHi CheePin,
1. Are the CLKUSR and refclk to TX PLL to the SDI TX directly sourced from free-running oscillators on board? This is to ensure successful power up calibration.
I am sure that the CLKUSR and refclk to TX PLL are free running..
2. From your description, seems like the tx_pll_locked stays low. We can narrow down our focus here because without the TX PLL achieving lock, the SDI TX will not work. Just to check with you which TX PLL type are you using?
Both are using fPLL, following the reference project. HDMI is using FPLL_1CB， SDI is using 1DB
3. Can you try with the latest Q21.2Pro to see if this problem persists? This is to isolate any Quartus dependent problem and any known issue which might have been fixed from Q19.2 to Q21.2 releases.
I don't have the license for new Q Pro..
4. Is there any relation between the HDMI core and the SDI core? For example, sharing the same PLL and etc.
No, there's no relation between HDMI and SDI..
5. Please check through the Quartus compilation warnings to see if you can spot any anomaly ie TX PLL spacing rules violation and etc.
OK, I will check.. I knew there limitation about using ATX PLL but it should work for fPLL..
We noticed that when the board is up, the 1st time sof downloading, SDI is not working.
But if we download the same sof again.. SDI will be back to work..
Any thought?
BRs,
Bin
- Bin_Wang
Dear CheePin,
I have tried to compile the project in Quartus 21.2pro, but there are some error occurred. The project was set up in Quartus 19.2pro.
The error listed:
1)More than 1 positional argument specified:,0.299...
2)ERROR: An erroroccurred during automatic periphery placement...
I don't know whether some env need to change when using 21.2pro.
So I attached the project, could you help to give some suggestion?
Thank you.
