Forum Discussion
Altera_Forum
Honored Contributor
15 years agoSD-SDI RX clock recovery
Hello, I am trying to implement SD-SDI core to receive SDI signals. The transmitter part works fine, however I need receiver to do the same. I have connected SDI in and out signals to create a loo...
Altera_Forum
Honored Contributor
14 years agoHi, Socrates
I am connecting a SD-SDI receiver to a codec chip which has CCIR656 video input. There're eight pins for YCbCr input, one pin for video clock (27MHz), and one pin for data enable on the chip. Your previous reply mentioned that the "RX_DATA_VALID_OUT" should be connected to the pin of video clock. I'm wondering if I should connect the "RX_DATA_VALID_OUT" to the pin of data enable and generate a clock of 27MHz as the video clock from an external clock with a PLL in my case. From your experience, is this design correct? Thanks.