Forum Discussion
Altera_Forum
Honored Contributor
14 years agoIronmoose,
I’m trying to implement the SATA protocol using the Stratix 4 ALTGX transceiver. We have our own SATA controller. We are doing the 8b/10b encoding in the link layer as the SATA standards specifies. However in the “Transceiver Architecture in Stratix IV Devices” document it says: In Basic functional mode, you can enable the optional rx_signaldetect signal (used for protocols such as SATA and SAS) only if you select the 8B/10B block. This will not work for us. We need the rx_signaldetect signal, but we can’t do the 8b/10b in the PHY layer since we are already doing it in the link layer. how did you get around this problem. I did noticed that is easy to trick MW into providing the rx_signaldetect output without having to select 8b10b encoding, and it does seem to work in simulation, but will it work in real hardware? skg