Forum Discussion

dsun01's avatar
dsun01
Icon for Contributor rankContributor
3 years ago
Solved

running AN708 on Quartus 17.0

Dear Intel Support/Expert, I am learning PCIe access DDR memory. the AN708 is a good example, I installed Quartus 17.0, and everything seemed very smooth. except the Simulation stopped due to Fata...
  • Wincent_Altera's avatar
    Wincent_Altera
    3 years ago

    Hi David,


    My apologies for late reply as my time is quite occupied these few days.

    Thanks for your patience and the follow-up question.


    Yes, the design is for hardware test rather than simulation test as mention in the user guide.

    If you want to run the simulation, my suggestion is you can try to refer to the Arria 10 User guide

    under section 2.1. Directory Structure and 2.4. Simulating the Design


    Let me know if there is anything else that I can help you.

    Regards,

    Wincent_Intel



dsun01's avatar
dsun01
Icon for Contributor rankContributor
3 years ago

Wchiah,

So, the demo is just show that Intel's core works. which nobody should doubt about. I will follow the Intel's idea, load the code to the board and use signal tap to track how the signals toggling.

thank you for the suggestion.

David

Wincent_Altera's avatar
Wincent_Altera
Icon for Regular Contributor rankRegular Contributor
3 years ago

Hi David,

I understand your feeling, you are free to doubt how it works.
But I just share some of my personal thought about this issue on this specific for this design example ONLY,
As you know sometimes there is an incident that happens as the simulation result is not the same as the hardware.

There are multiple issues causing that to happen, for example, clock frequency on the board, Using delays in test bench design, timing checker wasn’t given the right clock rate, and other related reasons. To be honest, I do not have had a chance to go deeply into this design example and find out why the architecture is preferred to work well only in hardware instead of simulation yet at the moment, but I do understand it is to provide the most accurate test experience/result to the user specific to this design example .

If you need to simulate it, the simulation environment is provided Arria 10 User guide that is tested.

Apologies for any inconvenience caused to you.

Regards,

Wincent - Personal thought

  • dsun01's avatar
    dsun01
    Icon for Contributor rankContributor
    3 years ago

    if the auto created simulation environment doesn't work, it will be great to explicitly claim that in the AN708 to save some time for learner like me.

    some designers like me always think Intel as a gold model. we will feel disappointed for any Non perfection. it is not Intel's problem at all.

    Thank you,

    David

    • Wincent_Altera's avatar
      Wincent_Altera
      Icon for Regular Contributor rankRegular Contributor
      3 years ago

      Hi David,

      I understand how you feel, I feel apologize for that.
      As mentioned, there are multiple reasons why it is set to limit to hardware test.
      (as FPGA could be very complicated sometime/somewhere)

      But I believe, it is to provide customers with the most accurate test experience.

      The requirement of running the reference design is stated in the AN708 user guide, page 10

      I really apologize for any inconvenience caused to you.
      For this case, my best help to you will be submit an internal ticket to request a simulation environment for AN708 design.
      So that the designer know there is a need for this. Hope this helpful to you.


      Regards,

      Wincent_Intel