Forum Discussion
rled64
Occasional Contributor
2 years agoHello, thank you for your reply,
I am trying to connect with DDR4 which is on the board through FPGA for writing into it, and through HPS for reading from user application what was wrote.
To access the DDR4, I use the EMIF IP configurated with dedicated parameters from the board so I can write through EMIF amm interface to the DDR4 with FPGA logic, and read through EMIF with HPS side application.
Does this makes sense ? The thing is that it worked when I used to send write commands at around 30 MHz, now that I need to write at 250 MHz, which is close to the 266MHz reference clock of EMIF IP, I'm afraid this is too fast because I can see that EMIF is not ready at a rate of 250 MHz.
Best regards,