Forum Discussion
Thanks Frank, That is very helpful, In my case i need to instance the ALT_PLL with all four of the clocks enabled in System Verilog (or Verilog). I would like to do that using the 'Set Frequency option' method as well and not the multiply / divide by method. With the following setup: The PLL Input frequency is 25 MHz, then i need to set the PLL output clocks c0 to c3 as follows:
c0 -> 100 MHz
c1 -> 5 MHz
c2 -> 50 MHz
c3 -> 125 MHz
Can you please provide me with an instantiation template as you did for the previous case ?
Thanks very much,
Barry
Hi Barry,
unlike altera_pll (e.g. used for Cyclone V) altpll IP doesn't accept MHz values.
You can however add arbitrary integer multiply_by and divide_by values, e.g. assuming 1 MHz reference frequency. They are automatically converted to appropriate PLL parameters. Also input frequency should be specified in ps.
module vpll_min (
inclk0,
c0, c1, c2, c3);
input inclk0;
output c0;
output c1;
output c2;
output c3;
wire [4:0] clk;
assign c0 = clk[0];
assign c1 = clk[1];
assign c2 = clk[2];
assign c3 = clk[3];
altpll altpll_component (
.areset (1'b0),
.inclk ({1'b0, inclk0}),
.locked (),
.clk (clk));
defparam
altpll_component.bandwidth_type = "AUTO",
altpll_component.clk0_divide_by = 25,
altpll_component.clk0_multiply_by = 100,
altpll_component.clk1_divide_by = 25,
altpll_component.clk1_multiply_by = 5,
altpll_component.clk2_divide_by = 25,
altpll_component.clk2_multiply_by = 50,
altpll_component.clk3_divide_by = 25,
altpll_component.clk3_multiply_by = 125,
altpll_component.compensate_clock = "CLK0",
altpll_component.inclk0_input_frequency = 40000,
altpll_component.operation_mode = "NORMAL",
altpll_component.pll_type = "AUTO",
altpll_component.self_reset_on_loss_lock = "OFF",
altpll_component.width_clock = 5;
endmoduleRegards
Frank
- drbarryh12 days ago
Occasional Contributor
Hi Frank,
Thanks very much for your help. Its a bit strange though because on editing the corrupted diagram for the intel ALTPLL IP version i can select the 'Set Frequency' tab for all of the 5 clock outputs and it lets me put in a frequency. I have to keep switching on and off a different TAB on the IP core GUI to see it clearly (only temporarily). But i am able to set frequencies.