Forum Discussion
Hi,
- The device driver in $QUARTUS_ROOT/ip/altera/altera_pcie/altera_pcie_software is designed to be compatible with the Altera PCIe IP core. The example design provided with the Intel PCIe IP core. Can I know where you get the file location ? it shall compatible with the example design that you generated.
- The file intel_fpga_pcie_ip_params.h.terp is likely to be processed by the Tcl Preprocessor (terp), which is a tool used to preprocess Tcl scripts. To process this file, you can run the command:
- terp intel_fpga_pcie_ip_params.h.terp > intel_fpga_pcie_ip_params.h
- This command will generate the pre-processed file intel_fpga_pcie_ip_params.h, which will then be included by the other source files. The Tcl Preprocessor tool is typically included with the Altera Quartus Prime software suite.
- I do not have information on whether someone has already ported the device driver located at $QUARTUS_ROOT/ip/altera/altera_pcie/altera_pcie_software/kernel/linux to the Linux 5.x kernel. This may be a task that requires changes to the source code to ensure compatibility with the new kernel version, as mentioned in your statement "it should be possible to port by updating some function arguments etc." It is possible that the OpenSource community may have information on a pre-existing port, but it may also require effort to port the code yourself.
Hope that answer your question.
Regards,
Wincent_Intel
Thank you for your reply.
1) Which example design does the device driver go with, ep_g1x1_APPS (included in the IP catalog) or the more generic one?
The latter is found in: $QUARTUS_ROOT/ip/altera/altera_pcie/altera_pcie_a10_ed
2) There is no file named terp in my Quartus installation:
find v21.3.0.170_pro/ -name terp -type f
Gives no output. I can find some tcl libraries related to terp, but no script/program named terp.
3) I've done some updates to support 5.x kernel changes, e.g. the changed access_ok parameters. But there seem to be a global variable which is not defined. It's declared as extern in:
intel_fpga_pcie_setup.h:extern struct global_bookkeep global_bk;
But I can't find the actual global anywhere. Did anybody manage to compile it on a 3.10.514 system?
- Wincent_Altera3 years ago
Regular Contributor
Hi,
Please accept my apology for late reply.
Can I know the reason you trying to look at the $QUARTUS_ROOT/ip/altera/altera_pcie/altera_pcie_a10_ed file ?
Is there any objective of doing it ? I am thinking is there any alternative/better way to perform what you trying to achieve.Regards,
Wincent_Intel
- zener3 years ago
Occasional Contributor
Thank you. I'm basically looking for a Cyclone 10GX PCIe reference design and a Linux driver/sw to write/read data from/to the host CPU to the FPGA RAM.
First I tried to find a simple PIO based design to do this as I asked in this thread:
As I was not able to find a simple PIO reference design/driver/sw I was going for the the somewhat more complex version using DMA.