question about lpm_divide pipeline ?

Hi,

The LPM_PIPELINE specifies the number of Clock cycles of latency associated with the quotient[] and remainder[] outputs. A value of zero (0) indicates that no latency exists, and that a purely combinational function will be instantiated. If omitted, the default is 0 (non-pipelined). You cannot specify a value for the LPM_PIPELINE parameter that is higher than WIDTH_Q.

and the PIPELINE_DELAY shifts the placement of the pipeline registered stages. By default, WIDTH_Q/2 starts at the middle stage. Specify 0 to start at the last stage. Specify WIDTH_Q-1 to start at the first stage. The default value is WIDTH_Q/2.

Thanks.

Best regards,

KhaiY

the key is that the logic resource is not engouth for my project, generally we can using time to save the usage of the logic resource. can we do that using the LPM_PIPELINE parameter , or the LPM_PIPELINE parameter just delay the output ,but the divider is still a pure combinational logic, and the area occupation will not decrease , and it always keep the same area occupation for the lpm divider although the LPM_PIPELINE parameter is value bigger than zero ?

Hi,

I tried to create two LPM_DIVIDE, one with pipeline 3 and one with no pipeline. The ALM used in the design with pipeline is more than the design with no pipeline. You may check this in the Resource Usage Summary.

Thanks.

Best regards,

KhaiY

Hi,

Do you have any updates?

Thanks.

Best regards,

KhaiY