Quartus 26.1.1: GTS AXI Streaming PCIe Reset Output Connection Error

Hi everyone,

After upgrading from Quartus Prime Pro 25.1.1 to 26.1.1, I encountered a new connectivity error in Platform Designer related to the GTS AXI Streaming IP for PCI Express.

The design was working correctly in version 25.1.1. However, after the upgrade, Platform Designer reports the following error:

intel_pcie_gts_0.p0_pin_perst_n must be connected to a reset source

According to the Altera documentation, p0_pin_perst_n is an asynchronous reset output derived from the PCIe Hard IP's PERST# input.

Platform Designer also identifies this interface as a "Reset Output", so it seems inconsistent that the tool requires it to be connected to a reset source.

My questions:

1. Is this a known issue or regression in Quartus Prime Pro 26.1.1?
2. Has the handling of p0_pin_perst_n changed between versions 25.1.1 and 26.1.1?
3. Is there a recommended workaround, such as exporting the unused reset output, or is an additional connection now required?

I would appreciate any clarification or suggestions.

Thanks in advance!