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anil_naik's avatar
anil_naik
Icon for New Contributor rankNew Contributor
4 years ago

Qsys On-chip memory access

Hi All, We have Qsys design with JTAG to Avalon Master Bridge and On-chip memory targeted to MAX10 Dev Board. Could not access memory through system console. seeing following error SEVERE: mas...
sstrell's avatar
sstrell
Icon for Super Contributor rankSuper Contributor
4 years ago

You don't need a license for this. Could the design be stuck in reset? You got 1 back from the jtag_debug_sample_reset command.

  • anil_naik's avatar
    anil_naik
    Icon for New Contributor rankNew Contributor
    4 years ago

    Yes. I did get 1 back from jtag_debug_sample_reset command

    I have pasted commands and responses below.

    % jtag_debug_sample_clock $jd_path
    0
    % jtag_debug_sample_clock $jd_path
    1
    % jtag_debug_sample_reset $jd_path
    1
    % jtag_debug_reset_system $jd_path

    % jtag_debug_sample_reset $jd_path
    1
    % set m_path [lindex [get_service_paths master] 0]
    /devices/10M50DA(.|ES)|10M50DC@1#USB-1/(link)/JTAG/(110:132 v1 #0)/phy_0/master
    % set claim_path [claim_service master $m_path ""]
    /channels/local/(lib)/master_1
    % master_read_32 $claim_path 0 1
    error: master_read_32: This transaction did not complete in 60 seconds. System Console is giving up.
    while executing
    "master_read_32 $claim_path 0 1"