New ContributorI got the following error while compiling the program by choosing the component like rx port of Hard IP with ptp TOD Syncroniser and tod clock in order to provide timestamp to process the data in fifo at a rate of 400G through MAC Segmented Interface.
Error(22627): Cannot find PTP adapter for the block eth_f_0|eth_f_0|hip_inst|x_bb_f_ehip|x_bb_f_ehip_rx.
Kindly resolve my problem,
thanks
Frequent ContributorHi,
May I know you are use which Quartus version?
Can you share your .qar file?
Best regards,
Zi Ying
Frequent ContributorHi,
Are you or someone else took the file original PTP file from Ethernet Hard IP and put a copy in the custom ip folder, then create your own custom ip PTP adapter file in platform designer?
Best regards,
zying
New ContributorHello @ZiYing_Intel ,
Sorry for the late reply, i'm using latest version of quartus prime pro software however i've tried in other version also. Here i'm not able to attach the .qar files as size of qar files increses the limit as specified.
Actually i'm enabling the ptp interface option from the F-tile intel FPGA hard ip parameter section.I've attached .qsys file only
i've written some module which takes data from rx port of Hard IP and send to FIFO buffer in avalon streaming mode.
thanks & regards
Balkesh
Frequent ContributorHi Balkesh,
If you right click the 'ptp' file in platform designer and click "Edit Component Instantiation" (screenshot below), you will see the source file is actually referring to the one located in ftile ethernet folder rather than the one located in custom ip folder. You can just delete the file since you are deleting the culprit which confuses Quartus.
Best regards,
zying
Frequent ContributorHi,
Since no hear any feedback from you, I now transition this thread to community support. If you have a new question, feel free to open a new thread to get the support from Intel experts. Otherwise, the community users will continue to help you on this thread.
Best regards,
zying
