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DidYouCatchThat's avatar
DidYouCatchThat
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3 years ago
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Proper way to add/initialize RAM in FPGA project?

Hi all, I'm trying to figure out the proper way to add memory to an ARM Cortex processor project. The goal here is to be able to toss in a few NOP instructions into memory, have the Cortex run...
  • ak6dn's avatar
    ak6dn
    3 years ago

    Yes, an IP block that instantiates the ALTSYNCRAM single port RAM module should work.

    This will build an INTERNAL FPGA memory using the device block RAM.

    You can initialize it with a .mif file when you instantiate the module.

    If you are trying to use EXTERNAL memory (like SDRAM, or SRAM) that cannot be initialized thru this means.

ak6dn's avatar
ak6dn
Icon for Regular Contributor rankRegular Contributor
3 years ago

DE10-LITE uses a MAX10 device, it is just an FPGA, no embedded processor.

Ref: https://www.terasic.com.tw/cgi-bin/page/archive.pl?Language=English&CategoryNo=234&No=1021&PartNo=1#contents

So your question re: ARM/CORTEX makes no sense.

Are you using a compiled NIOSII processor?

Or is your board something else that has a SOC ARM FPGA?

As an aside, if you are using INTERNAL FPGA block ram, that can be initialized in the design file via .mif memory initialization files.
For example, you can build ROM devices within the FPGA logic structure that use this means.

External memory, tho, like SDRAM or SRAM, cannot be initialized like this. It is up to your code to initialize it by some means.

DidYouCatchThat's avatar
DidYouCatchThat
Icon for New Contributor rankNew Contributor
3 years ago

Apologies for being unclear.

I have the verilog files for the ARM Cortex M0 as part of their educational program. It compiles and I am able to program it into the DE10-Lite. This was phase one of my research project.

I'm now trying to see if the Cortex actually works by connecting it to the internal FPGA ram in order to run a simple program and track the logic. This would be phase two of the project.

I'll look deeper into the .mif files. Is my initial approach of using the IP catalog to add a RAM controller into my design the right direction?

  • ak6dn's avatar
    ak6dn
    Icon for Regular Contributor rankRegular Contributor
    3 years ago

    Yes, an IP block that instantiates the ALTSYNCRAM single port RAM module should work.

    This will build an INTERNAL FPGA memory using the device block RAM.

    You can initialize it with a .mif file when you instantiate the module.

    If you are trying to use EXTERNAL memory (like SDRAM, or SRAM) that cannot be initialized thru this means.