Problems with SGDMA through PCIe in several motherboards

Hello,

We restarted this project. A small new project has been set up containing only the PCIe Compiler and SGDMA cores. The latter one is fed continuously by a fixed value for test purposes. A fully new and clean driver has been written too. The chip is the same as before (Cyclone IV GX 22).

The card behaves exactly the same as the original design so there should be a fault somewhere in it. I do not think these two Altera IP cores are so bad. I think we have to examine the SW/driver side also.

Maybe this is just a small initialization or configuration mistake. Does the PCIe bus have any fixed configuration process in SW side? From where could we learn this process?

The SW developer guy was examining the Jungo driver supplied to the PCIe demo board but he said that source was not enough.

Regards,

Istvan