Forum Discussion

New Contributor

1 year ago

problem to use F-Tile Avalon® Streaming Intel® FPGA IP for PCI Express*

Hi, I want to use F-Tile Avalon® Streaming Intel® FPGA IP for PCI Express* to generate a demo with gen3 1x4 mode. When I was compiling, the following error occurred: Error(22728): Synthesis is run ...

Pcie

RongY_altera

Contributor

1 year ago

Use bank 12C

Geats_X

New Contributor

1 year ago

When I assign PIN_T59 of bank12c, it will also display 'Editing location assignment is not successful. Not assignable'.

Forum Discussion

problem to use F-Tile Avalon® Streaming Intel® FPGA IP for PCI Express*

Recent Discussions

Cyclone® 10 GX Avalon®-ST Interface for PCI Express example Simulation

Agilex-7 AXI MCDMA for PCIe hang

Can't generate F-Tile Ethernet Hard IP Design Example

Avalon-MM Cyclone V Hard IP for PCI Express Intel FPGA IP Soft Reset and Hard Reset

Agilex 7 slew rate reconfiguration