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New Contributor

1 year ago

problem to use F-Tile Avalon® Streaming Intel® FPGA IP for PCI Express*

Hi, I want to use F-Tile Avalon® Streaming Intel® FPGA IP for PCI Express* to generate a demo with gen3 1x4 mode. When I was compiling, the following error occurred: Error(22728): Synthesis is run ...

Pcie

RongY_altera

Contributor

1 year ago

If no further questions, I'll transit this case to community support. Thanks.

Geats_X
New Contributor
1 year ago
I have another question regarding device AGIB041R31B1I2VC, when I want to assign pin_perst_n to PIN_CG52. Why does PIN_PLANER display 'Editing location assignment is not successful. Not assignable'? The pins of PCIE tx and rx PCIe are all assigned in BANK12A.

Forum Discussion

problem to use F-Tile Avalon® Streaming Intel® FPGA IP for PCI Express*

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