Forum Discussion
Geats_X
New Contributor
New Contributorproblem to use F-Tile Avalon® Streaming Intel® FPGA IP for PCI Express*
Hi, I want to use F-Tile Avalon® Streaming Intel® FPGA IP for PCI Express* to generate a demo with gen3 1x4 mode. When I was compiling, the following error occurred: Error(22728): Synthesis is run ...
RongY_altera
Contributor
ContributorIf the errors you posted is due to the replacement of pio and mem with your own user logic, we may need to check your design connections.
PIO design is provided as a starting point for learning the basic mem read/write.
Regards,
Rong
Geats_Xok, Rong. Thanks for your reply. I'll try to modify my design first.
