Forum Discussion
Altera_Forum
Honored Contributor
16 years agoI tried this code and I think the pre-emphasis works. But the output-signal is very distorted in the higher frequencies and the lower frequencies are very attenuated. Here is the modified VHDL-code:
if (rst = '0') then
xi := (others => '0');
xi1 := (others => '0');
yn_tmp := (others => '0');
yn_tmp2 := (others => '0');
b0_var := ("01100001"); --97
div := ("01100100"); --100
elsif (clk'event and clk = '1') then
x <= input;
xi := x; --new value
yn_tmp := xi1 * b0_var;
yn_tmp2 := yn_tmp / div;
yn := resize(xi, yn_tmp2'length) - yn_tmp2;
output <= resize(yn, output'length);
xi1 := xi; --old value
end if; Normally the lower frequencies would go through without gain and the higher frequencies starting at 3 kHz have to be boosted with 6dB/octave.