Pos phy spi-4.2 ip core

Hi

i am trying to establish a communication between two Cyclone-IV FPGA based boards with the help of SPI IP core.

I am trying at 100 Mbps data rate

a0_arxval signal is asserted if a particular data is transmitted from the transmitter

if i change the data with insertion of 0's then a0_arxval is not getting asserted.

what are the factors affecting my system??

can anyone suggest me the reasons??

regards

nagendra