Honored Contributor
Honored ContributorOliver,
Have you looked at the SGDMA demo design? Its register set is fully documented and it supports a generic bidirectional descriptor-table-based DMA approach. The sad thing about the SGDMA example code is that it is not fully PCIe compliant (e.g, no completion timeout mechanism), ugly code in my eyes, and you will have a hard time tailoring hardware and driver to your specific needs if the base code is not enough. I agree, it would be great if there was knowledge provided on how to craft a DMA design from scratch. Truth is, every design is different on its internal hardware interfaces as well as the required software interfaces. Is it supposed to act as a network adapter? Does it transport a stream of data? Or multiple such streams? Is there an internal CPU to interface with, or just hardware? Is there a memory or a Fifo to interface with? Do you need support for auxiliary functions like frame time stamping, hold-off, shared memory, flow control, other functions … ? – Matthias
