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Altera_Forum's avatar
Altera_Forum
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12 years ago

Phase reconfig control register altpll on cycone iv

Hello,

I´am trying to get the dynamic phase shift for altpll run. Therefor i have two pll´s and i want to shift one of them with register

Phase reconfig control register from document Embedded IP page 355: altera.com/literature/ug/ug_embedded_ip.pdf

But it doesn´t work.

Can anyone help me?

sebastian

2 Replies

  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor
    12 years ago

    Hi,

    Im using cyclone II for my application, everything got okay but problem is with PLL, my input clock freq is 50MHz and i successfully generate what i need freq (150 MHz) using PLL Mega manager tool but actually i want to reconfiguration my self using Varilog HDL language, i dont understand how to config PLL. any one tell me how to config PLL without using inbuilt tools or pre made library.

    Thank you

    JP