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on PERST# assertion, CPLD programs the FPGA
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This is not the correct solution.
When the CPLD first powers on, it should program the FPGA. There is no need to program the FPGA when PERST# asserts.
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The only thing I am unable to do is to cause a re-enumeration without restarting the PC. (For eg. if I reprogram the FPGA via JTAG, and try to access the PCIe interface, it would not be recognized, since the enumeration is happening only during powerup/reboot). Any idea, if there is a way I can achieve that? Hotplug?/warm reset?
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Yeah, you can use hot-plug under Linux. I'm not sure about Windows.
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I was trying to do that, but unfortunately I dont have any vias on the board to probe on conf_done. All I could get my probe on was the nConfig signal (config start), which as you would expect is happening at the reset edge.
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If you are using a CPLD to program the FPGA, then you should have a pretty good idea as to how long programming will take. So how long is that?
Cheers,
Dave
Honored Contributor
