PCIe transactions between two FPGAs through switch.

Hi again,

I have established a Qsys system, with all needed avalon components (pcie hard ip, sgdma dispatcher, dma read/write, ...) so as to have a pcie communication on Cyclone IV GX [i was based on provided Altera examples] ..

I connected the FPGA to PC, and i'm able to send pcie transactions from PC to FPGA (to the onchip memory on the avalon bus), without problems. Now, i want to send transactions from FPGA to PC, does the provided pcie examples include transmitting transactions outside the FPGA? how to interface the pcie hard ip to define transactions' attributes (destinations address, size, ...)? i added a nios2 processor to the avalon bus as well, is there a software library that interface the pcie ip ?

thanks!