PCIe Stratix 10 Avalon ST

Hi,

How does the credit tracking interface operate ? The tx_nph_cdts[7:0] signal in particular.

How does this signal work. Does it report how many credits are available to the application for non posted requests ? Also when the interface tells you a credit is consumed what exactly does this mean? How do we know when credit is restored ?

Yes. tx_nph_cdts[7:0] is the header credit net value for the FC non-posted requests. Credit is consumed means the credit is not available for the following transaction.

RX_buffer_space = (credit_limit - credits_consumed)+ released_credits

The hard IP core does not report the internally consumed credits to the Application. Without knowing the hard IP core's internal usage, the Application cannot maintain a completely accurate count of Posted or Completion credits.

The hard IP core does not consume non-posted credits. Consequently, it is possible to maintain an accurate count of the available non-posted credits. Refer to the TX Credit Adjustment Sample Code for code that calculates the number of non-posted credits

available to the Application. This RTL recovers the updated Flow Control credits from the remote link. It drives the value of the link partner's RX_buffer_space for nonposted header and data credits on tx_nph_cdts and tx_npd_cdts, respectively.

https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/ug/ug_s10_pcie_avst.pdf (Page 179)

Thanks

Best regards,

KhaiY