Forum Discussion
agula
Occasional Contributor
5 years agoPCIe SRIOV VF capabilities
Hi,
When using virtual functions on the Arria 10 device , I notice that the virtual functions do not have the same maximum read size and maximum payload size as the physical function. Is there a wa...
Deshi_Intel
Regular Contributor
5 years agoHI,
Based on what I read from the user guide doc, by right the virtual function register (PCI Express Device Capabilities Register) should be the same between physical function (PF) and virtual function (VF)
- https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/ug/ug_a10_pcie_sriov.pdf
- page 101 - PCI Express Device Capabilities Register. The VF Device Capabilities Register supports the same fields as the PF Device Capabilities Register.
So, let's take max payload setting for example
- page 85 - reg (0x084) - Maximum Payload Size supported by the Function. Can be configured as 000 (128 bytes) or 001 (256 bytes)
- The setting should follow the max payload setting set in PCIe IP
- page 24 - the only requirement in max payload setting is just to set setting > 128 if used more than 2 PF
May I know where do you see the setting difference in PF vs VF ?
Thanks.
Regards,
dlim
- agula5 years ago
Occasional Contributor
I received this information through lspci -d 1172: -vv
DevCtl under the PF capabilities shows a MPS of 256 and read request size of 4K.
DevCtl under the VF capabilities shows a MPS of 128 and read request size of 128.
I'm more worried about the read request size being that small. Since I need high bandwidth on all virtual functions for network interfaces.
Thanks