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Altera_Forum
Honored Contributor
14 years agoPCIE link -up status
Hi , I am migrating an old design i had using a soft PCIE core to cyclone 4's hard IP. I had a 'link-up' status signal which I used to drive an LED whenever the link became active. Is there an equiva...
Altera_Forum
Honored Contributor
13 years ago"pcie_rstn" is the PCIe edge connector reset line, so you can detect when you are hot-plugged into a host or the bus is reset. Not much point in showing this.
For link state, read the datasheet, and you will find a couple of bits in pcie_hard_ip_0_test_out_test_out show what you are looking for. LTSSM states are useful to decode if you have enough LEDs - PCIe in L0 state usually is good enough for single bit display.