PCIe implementation in Cyclone IV

Hi friends,

I try to implement the Hard IP of PCIe in the Cyclone IV Dev Kit and i have a problem with the application layer, i don't know if i need to implement a nios to master the avalon interface or just a DMA ?

and if i want to made request from the FPGA to the PC how can I do it ??

do you have any idea about these questions ??

thnx :)