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jmcguire3's avatar
jmcguire3
Icon for Occasional Contributor rankOccasional Contributor
4 years ago
Solved

PCIe HIP - only one legacy INTX interrupt available

I have a legacy support task - obsolete hardware, critical system, etc - where I need to emulate some old, obsolete, unobtanium peripheral components in an FPGA. The peripherals in the system use th...
  • Wincent_Altera's avatar
    Wincent_Altera
    4 years ago

    Hi,

    Apologize for late, hope this helpful.
    There is two AVMM example available in the Quartus, one is AVMM another one is AVMM+

    • For the AVMM example design indeed you will get "1"

    The document provided by you early 3.2.3.3.1. Interrupt Signals Available when the PCIe Hard IP is an... (intel.com)

    Shows that the 4bits intx_req_i is only available for AVMM+

    I try to run the example design (AVMM+) and I get the result below

    Let me know if this is helpful, please correct me if i am wrong.

    Regards,

    Wincent_C

Wincent_Altera's avatar
Wincent_Altera
Icon for Regular Contributor rankRegular Contributor
4 years ago

Hi,


I strongly believe my previous reply answered your question.

We do not receive any response from you to the previous answer that I provided.

This thread will be transitioned to community support.

If you have a new question, feel free to open a new thread to get support from Intel experts.

Otherwise, the community users will continue to help you on this thread. Thank you

If you feel your support experience was less than a 9 or 10,

please allow me to correct it before closing or please let me know the cause so that I may improve your future support experience.

Regards,

Wincent_Intel