New Contributor
ContributorThe Hard IP reconfiguration interface only can be used to reconfigure the read-only register. For instance, use this interface to modify the device ID register at run time. It cannot be used to change the pcie link speed from Gen3 to Gen2.
Users need to set the intended link speed during IP parameterization, recompile Quartus to get the .sof, then reconfigure the device.
New ContributorHello, we can't modify the deviceID either, could you provide some example? We just want to enumerate to the BIOS a maximun speed of gen2. We can do it from intel BIOS, but this option is not available for AMD processor, and we would like to change the value of maximun speed supported.
Thanks in advance and best regards.
ContributorA10 user guide below at section '5.7.1. Hard IP Reconfiguration Interface' has the description and timing diagram of hip_reconfig_* interface.
https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/ug/ug_a10_pcie_avmm.pdf#page=56
ContributorMay I know what is your intention to modify the deviceID? Is that you want to try using the hip_reconfig* interface to modify the deviceID, after that use the same interface/method to also modify the speed_change_hwtcl to change the pcie link speed?
