pci express sopc vs qsys

Personally I wouldn't use auto-assigned addresses for anything other than trivial designs.

If you assign addresses yourself you can group them sensibly - which may be necessary if you find you need to add a bridge for any reason.

Your host always has to do accesses relative to the base of the BAR (ie add the offset to the address returned by ioremap_uncached()).

On the FPGA the PCIe master interface uses the address bits (only the width of the BAR) to select between its avalon slaves.

So the size of the BAR (always a power of 2) is all that matters. In some sense the PCIe's Avalon master interface supplies the high address bits, but since the Avalon 'bus' is slave arbited they are never actually used!

Although the SOPC builder and QSYS give each slave an address, the address is a property of the master interface. There is nothing technically stopping different masters using different addresses for the same slave! (It would be confusing though - which may be why it isn't allowed).