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Altera_Forum
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11 years ago

PCI express gen3 x8 Avalon-MM 256 bit DMA core multiple request hang issue

In attempting to perform multiple DMA requests in parallel with the example design, it seems that something in the core ends up in an inconsistent state. After performing a single DMA read of 128 by...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
11 years ago

I can't see how a DMA controller that accesses the PCIe block through it's Alavon slave interface can ever generate multiple concurrent TLB - especially read ones for different transfers.

To my mind the DMA controller needs to be embedded inside the PCIe block.