Forum Discussion
Altera_Forum
Honored Contributor
14 years ago --- Quote Start --- The input to the demux should have a channel signal so that the demux and de-interleave the data to various outputs. For example if you sent a stream of data like this:
Data Channel
1 0
3 0
5 1
8 0
--- Quote End --- Everything is correct, when I change the channel signal, the data goes as required. However, I use demultiplexer with 16 channels output (channel is 4 bits wide). My core which controls the channels also has channel signal 4 bits wide. Everything here is fine, but I get error for max channel parameter, so I have to use channel adapter: The source's max channel is 0, while the sink's is 15. Consider inserting... If I could define that max channel parameter in my core, I could connect the core directly to demultiplexer without using a channel adapter. It's a very simple solution, but I don't know how to set that internal parameter in VHDL. It should be generic? Which type?