Forum Discussion
Amirg
New Contributor
New ContributorPartial reconfiguration fails on arria 10, im getting PR_DONE time out and incompatible bitstream error.
I have a specific block in my design which is set to be of type "Reconfigurable" and is placed on "Fixed/Locked" (Fixed with expansion 1) Logic lock region. The PR controller ip is "Partial Reconfig...
JohnT_Altera
Regular Contributor
Regular ContributorHi,
May I know how do you program the PR RBF file into the FPGA? May I know which Quartus version are you using? Have you try the example design from https://www.intel.com/content/www/us/en/programmable/documentation/ihj1482170009390.html?
