NVMe / PCIe storage on Arria10
- 6 years ago
Hi All,
We have fixed our issue.
The problem was not related to the kernel drivers or settings of the PCIe IP itself.
The example on the rocketboards page is correct ( as I expected ).
Our problem was in the memory assigned to the Kernel and mapped to the PCIe core.
The board we have has a total of 4GB of ram for the HPS, which is effectively 3GB for the HPS because the HPS to FPGA bridges and other IO claims the upper 1GB of the available memory space.
The Avalon master port of the PCIe core must be connected to the memory through a address expanded and the window this provides to the RAM can be set in power of two increments so 1GB, 2 GB or 4GB.
In our case we had our boot-loader configured to give the Linux kernel 3GB of memory, and the PCIe core had a 2GB window to the RAM.
My guess is that the kernel had memory allocated for PCIe above the 2GB window.
The solution for our system was to limit the memory for the kernel to 2GB by configuring this in the boot-loader.
So for us the issue is solved, I hope these posts can help someone else that is trying to get PCIe working on there own custom Arria 10 HPS designs.
Regards,
Rienk