ZaidSahawnehNew Contributor1 year agoNo link with 10G Low Latency I've been modifying my project from 40G ethernet to use the Intel 10G LL MAC. I removed the old MAC, and inserted the generated project for the 10G LL MAC into the design but when I connect a fiber f...Show More
Recent DiscussionsCORDIC ATan2 Failed to GenerateWhere is High Speed Transceiver Demo Design in FPGA Wiki ?Technical Inquiry regarding DPCU Block for CPRI IP Single-Trip Delay CalibrationI want to use a lot of 10GBase-R PHY on an Agilex 5 EJESD240B - No license