Forum Discussion
praveenkumar
Occasional Contributor
5 years agoNios II/e Core maxm clock
Hello,
can anyone tell me the maximum usable clock frequency for Nios II/e Core .
in real time i am facing difficulty trying clock frequency more than 100 mhz.
can anyone give me the solution...
praveenkumar
Occasional Contributor
5 years agoThanks for reply,
in the thread which you provided can't find regarding cyclone iii .
can u assist with the timing analysis and also dma interrupt mechanism .
i have to receive 24 bytes using uart with dma .
Regards
praveen kumar
sstrell
Super Contributor
5 years agoThe numbers in the document don't really matter. What matters is that your design meets timing requirements for the device, which is what timing analysis is for. Again, do you have a .sdc file? Did you perform timing analysis to see what path(s) might be failing timing?
If you need help, you can get started with this training:
https://www.intel.com/content/www/us/en/programmable/support/training/course/odsw1115.html
- praveenkumar5 years ago
Occasional Contributor
Thank you for reply .
i will get back to you after the training session for further queries