Honored Contributor
Honored ContributorHello,
Thank you for pointing out the CRC example! I understand what you are trying to say. The dataa and datab register references will go to the custom instructions, and those point to the RAM where 1024 bit operands are stored sequentially. I was looking into the modules CRC_Custom_Instruction.v and CRC_Component.v. I have some questions on the implementation that I might have to do for my design. I think that the dataa signal of the module CRC_Custom_Instruction.v has to remain as a signal of width 32 (input [31:0] dataa;) since the NIOS II data width is 32 and the register dataa is in its data path. However the writedata signal in the CRC_Component.v module can be a signal of 1024 bit width so that I can perform operations on the entire 1024 bit. Is this what you are trying to say? There is no other way to refer memory directly (like pointers) from a hardware description language, right? If this was a language like C/C++ (I know a bit of those) I would have had pointers pointing to the memory locations and would have read sequentially from the memory and done the operations. I am not an expert in the HDLs , so I have to ask these questions. I am sorry for the trouble.
