Forum Discussion

NWein's avatar
NWein
Icon for Occasional Contributor rankOccasional Contributor
4 years ago
Solved

Multiple questions: writing to PCIe TXS port with 64-bit addressing (Cyclone10GX)

I'm attempting to do DMA writes to the TXS port, with 64-bit addressing enabled. A SignalTap trace shows the bus transfers working fine, but data is not appearing in main memory (at least, not where...
  • SengKok_L_Intel's avatar
    SengKok_L_Intel
    4 years ago

    Hi,


    1. Yes, you are right. No translator is needed for 64 bit addressing.
    2. The TXS port, it is using byte addressing. If you set the address to 33, the memory size that you can access is 2^33 bytes. From the Platform designer, you will see the address range is from 0x0 to 0x1_ffff_ffff when the addressing width is 33 bits.

    Regards -SK


SengKok_L_Intel's avatar
SengKok_L_Intel
Icon for Regular Contributor rankRegular Contributor
4 years ago

Hi,


  1. Yes, you are right. No translator is needed for 64 bit addressing.
  2. The TXS port, it is using byte addressing. If you set the address to 33, the memory size that you can access is 2^33 bytes. From the Platform designer, you will see the address range is from 0x0 to 0x1_ffff_ffff when the addressing width is 33 bits.

Regards -SK


NWein's avatar
NWein
Icon for Occasional Contributor rankOccasional Contributor
4 years ago

When I supply a byte address, it works as expected.

It might be a good idea to state this more explicitly in the documentation (it just says "address"). Having a byte address there runs contrary to my expectations.