It looks like there is a problem with the f2h_sdram interface.
I added two on-chip memory to my design and configured one as rom and one as ram and transfered data between them without any problem.
I have also seen that the msgdma shows the behaviour, that after I have send a descriptor to it it keeps in busy. I can reset this by setting the reset dispatcher bit of control register. But I can't get the msgdma into stopped status, even if I have done a reset before. It seems like the msgdma module does stuck in a transfer even after I have reset it. When I transfer another descriptor after the reset this one keeps in the descriptor buffer, another sign that the old descriptor is still in progress after the reset.
Is there a known issue with connection between the msgdma and the hps f2h sdram? Or could anybody provide me a qsys configuration example?