Lior_Ovad
New Contributor
3 years agomsgDMA - how to clear the IRQ signal
Hello,
I'm having a problem with using interrupt within msgDMA.
I'm using MAX10 development kit.
The design includes msgDMA (ST to MM) which transfers data from FIFO (Avalon-ST Dual Clock FIFO Core) to on-chip memory (On-chip RAM) and apply an interrupt when transfer completes.
However, the IRQ signal remains at level '1', and the only way I managed to lower the signal (reuse the interrupt) was by resetting the dispatcher of the msgDMA (and the reset process takes some time).
Is there another way to relaunch the interrupt of the msgDMA? i.e a way for the system to succeed catch the next event.
Thanks,
Lior