Forum Discussion
New ContributorModel sim error - fPLL
Hi,
Since you are using Quartus Prime Pro edition, you will need to edit your .do file before you simulate your project. From your .do file you are missing a lot of commands:
- Compile all design and testbench files in your project. "vlog -vlog01compat -work work ../<design and testbench files>"
- This is to set the top-level simulation or testbench module/entity name. "set TOP_LEVEL_NAME <simulation top>"
- Call command to elaborate your design and testbench. "elab"
- To run the simulation. "run -a"
You can refer to section 1.4 of this document to understand better: https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/ug/ug-20093.pdf#page=6
You also need to save your file as wojtek.do instead of wojtek.tcl.
Best regards,
Nurina
Regular ContributorHi,
Is the fPLL written by you or did you instantiate it on Quartus?
Do you have a testbench? Can you show us the code for your testbench?
Can you also share your .do file?
Thanks,
Nurina
- Wojtek_Poland
Hi!
I created separated project in order to investigation problem. Previously problem occurs in project which was including all neccessery PHY components - Transceiver PHY, Reset and PLL (fPLL). correctly connected. So i uploading separated project (Nowyfolder5) where only is fPLL component.
Tesbench: fpll_symulacja_test_o
Do file: wojtek.tcl in Nowyfolder5\fpll_o\pllka_o\sim\mentor
