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bibo's avatar
bibo
Icon for New Contributor rankNew Contributor
3 years ago
Solved

MCDMA/PCIe - what is frequency of coreclkout_hip?

Hello, In the user guide, with H-tile types - Gen3x8, application clock or coreclkout_hip frequency = 250 MHz. But I could not verify it in the TA clock report. Instead, I could see "dut|dut|...
  • Wincent_Altera's avatar
    Wincent_Altera
    3 years ago

    Hi,


    I think that indicates the Clock Fmax.
    If you changed the optimization Mode from Balanced to Aggressive Area you can achieve the 500MHz.

    The Fmax specification is based on the fast clock used for serial data.

    The interface Fmax is also dependent on the parallel clock domain which is design dependent and requires timing analysis.

    Hope this clarified.

    Regards,

    Wincent_Intel

Wincent_Altera's avatar
Wincent_Altera
Icon for Regular Contributor rankRegular Contributor
3 years ago

Hi,


Apologize for late reply, as I am looking at the design provided by you.

I am able to replicate your issue based on the MCDMA design provided in the IP catalog of H-tile.

I am getting the same result as yours which is 500MHz.


The next action I will do is to raise an internal ticket to the responsible team.

Temporarily we do not have any solution to this issue, expected to be fixed in next release version of Quartus.

I will update you if there is any update from the related team.


Regards,

Wincent_Intel


  • bibo's avatar
    bibo
    Icon for New Contributor rankNew Contributor
    3 years ago

    Hi Wincent,

    Thanks for the confirmation and your support.

    I think you can close the case now.

    Regards,

    TN