Forum Discussion
MCDMA/PCIe - what is frequency of coreclkout_hip?
- 3 years ago
Hi,
I think that indicates the Clock Fmax.
If you changed the optimization Mode from Balanced to Aggressive Area you can achieve the 500MHz.The Fmax specification is based on the fast clock used for serial data.
The interface Fmax is also dependent on the parallel clock domain which is design dependent and requires timing analysis.
Hope this clarified.Regards,
Wincent_Intel
Hi,
Sure! This is the PLL configuration
And the system view with clock interfaces
And this is what clock report with the final snapshot
- clkout of the IOPLL
- And clock network report
Regards,
TN
Hi,
I think that indicates the Clock Fmax.
If you changed the optimization Mode from Balanced to Aggressive Area you can achieve the 500MHz.
The Fmax specification is based on the fast clock used for serial data.
The interface Fmax is also dependent on the parallel clock domain which is design dependent and requires timing analysis.
Hope this clarified.
Regards,
Wincent_Intel
- bibo3 years ago
New Contributor
Hi,
Thanks for your clarification.
So, how could I review the actual clock frequency?
Regards,
TN
- Wincent_Altera3 years ago
Regular Contributor
Hi,
The way you review the clock frequency at the first post shall be correct as per mention in the user guide.Regards,
Wincent_Intel- bibo3 years ago
New Contributor
Hi,
Thanks for your help.
That means:
In this case, we could not see the actual clock frequency in the Timing Analysis report, and the only way to know the exact number is by reviewing the code.
Is that correct?
Thanks and Regards,
TN