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jingluen's avatar
jingluen
Icon for New Contributor rankNew Contributor
3 years ago

Max10 FPGA ROT real example

Dear Intel sir I can't find any ROT (root of trust) example using Max10 FPGA to do NIST specification, most of them are explaining the process of verifying BMC or PCH FLASH at T-1, but this is not ...
JohnT_Altera's avatar
JohnT_Altera
Icon for Regular Contributor rankRegular Contributor
3 years ago

Hi,


Based on my understanding, you are looking for dual configuration user guide and also encryption. We do not have specific documentation to use dual configuration with ROT.


You may refer to https://www.intel.com/programmable/technical-pdfs/683865.pdf . Chapter 3.8. AES Encryption and Chapter 4.2. Dual Configuration Intel FPGA IP Core


jingluen's avatar
jingluen
Icon for New Contributor rankNew Contributor
3 years ago

Dear Intel Sir.

I've read it but I'm still a little confused.

I want to check that for Intel server system ,use dual configuration IP is called ROT? and Encryption is only AES? or will be updated in the future?

Such use dual configuration to do ROT , Can it met the NIST800-193 specification?

I have study some server platforms file and circuit of Intel use Max10 to do system PFR( this process is Max10 do ROT(self check FW ), then chain of trust to check PCH/BMC flash(PFR)), So I think Intel can give some suggest for these questions.

thanks