max burst size

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Please explain what you mean by this statement: "I need to transfer 1.2Mb of data in more than 64 64 bit blocks (4096 bytes)"

At the DDR2 device level the burst size is either 4 or 8, so it's very nice that the Altera controller allows you to use bigger bursts on the user side, which the controller then breaks down into many smaller bursts of 4 or 8 on the memory side. I assume that the choice of 64 as the maximum was just a somewhat arbitrary design choice. They had to pick something as the maximum and they happened to choose 64.

What is the problem with breaking your transfer into as many bursts of 64 as needed to complete it?

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Time constraints we need to transfer live HD video into the FPGA, between 1 and 2 Mb each image.