ymiler
Contributor
ContributorLVDS SERDES IP
Hi
I have task to transmit data from 1 board to another
Each board has FPGA stratix 10M
To do it - I use LVDS SERDES IP in FPGA (TX) and other LVDS SERDES IP in FPGA (RX)
All the pins d...
Forum Discussion
Ash_R_Intel
Regular Contributor
Regular ContributorHi,
You may want to look into the terminations applied to each of the LVDS pins. Also, you can check on the RREF pins. For more details, please refer the Stratix 10 Pin connection guidelines. https://www.intel.com/content/www/us/en/programmable/documentation/lod1484643014646.html#wsh1484644837897
Regards.
