Forum Discussion
AdzimZM_Altera
Regular Contributor
3 years agoHi KCMurphy,
Is the EMIF IP has been setup with correct parameter by referring to memory datasheet and board simulation?
Is the design has fully constrained?
Are you able to see similar behavior with other board if applicable?
Regards,
Adzim
KCMurphy
Occasional Contributor
3 years agoWe believe this was a power sequencing issue. If we hold the EMIF interface in reset until our controller releases it, the calibration proceeds correctly.