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Altera_Forum
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10 years agoPCIe core configuration space register address 0x3D defined Interrupt Pin as below:
- 0x00: No INT x# pin used - 0x01: INTA# used - 0x02: INTB# used - 0x03: INTC# used - 0x04: INTD# used The Interrupt Pin is default to 0x01: INTA# used. When have multiple legacy interrupts, this field might needs to change to avoid conflict.