Issues using ST-Avalon root port on Stratix 10 MX development Kit

Hello,

Thanks for your answers

@User15732617883183674336​ I tried with CML and high-speed differential I/O, same errors ...

@NathanR_Intel​ I read the documentation and for my board, I think every thing is ok. My errors happen in the fitter step for only 7 pins of 32.

I attache my project If some can help, I disabled the 7 pins that are generating errors. I use Quartus prime Pro 19.4 on Linux

Best regards,

Amine