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AKhel1's avatar
AKhel1
Icon for New Contributor rankNew Contributor
6 years ago

Issues using ST-Avalon on Stratix 10 MX development Kit

Hello, I am porting an endpoint PCIe IP on my Stratix 10 MX development kit (1SM21BHU2F53E1VG) and I have some issues. When using a test IP (xillybus) with ST-Avalon PCIE gen2 x8 and a correct pin...
BoonT_Intel's avatar
BoonT_Intel
Icon for Frequent Contributor rankFrequent Contributor
6 years ago

Maybe you can open the IP GUI (platform manager), generate the example design (top right corner), compile the example design without any location assignment and see if the fitter is pass.